Address, Data and Control Buses
Looking at how the CPU and RAM are connected (spoiler: buses) - and the differences between the address, data and control bus. If this video was useful, please like it and subscribe, it really helps! Also, if you use an ad blocker, whitelisting my channel is very much appreciated! Any questions/ feedback/ enquiries: tutorcomputerscience@gmail.com These videos will always be free but if you'd consider a donation I'd be extremely grateful: https://www.paypal.me/computersciencetutor To watch the videos in their intended order and only those applicable to your Computer Science course, please use the following playlists: OCR GCSE Paper 1: https://www.youtube.com/playlist?list=PL04uZ7242_M60Z2F8qV7sId99cuwV_Z3T OCR GCSE Paper 2: https://www.youtube.com/playlist?list=PL04uZ7242_M5KsKU1axzQ20dl4ZvYHPZn AQA GCSE Paper 1: https://www.youtube.com/playlist?list=PL04uZ7242_M6yYkM_hA2mzBZGcvEnLSOU AQA GCSE Paper 2: https://www.youtube.com/playlist?list=PL04uZ7242_M6yJQRfFcPUhAxykFNuPQy6 Edexcel GCSE Paper 1: https://www.youtube.com/playlist?list=PL04uZ7242_M7105DQI8OfbqivqoRkhVYM Edexcel GCSE Paper 2: https://www.youtube.com/playlist?list=PL04uZ7242_M7kpBJ0EvRg84ocbevp6hqr